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| MIC4807 Micrel MIC4807 80V 8-Channel Addressable Low-Side Driver General Description The MIC4807 is an 80V, 8-channel, addressable low side driver with latches and TTL/CMOS compatible logic inputs. Each logic input is composed of a comparator with a 1.4V bandgap-derived reference serving as the trip point. The addresses (AIN, BIN, and CIN) and Data-in logic inputs have an internal 50A pull-up current source, while the Output Enable (OE), Chip Select (CS), and Clear logic inputs have an internal 75A pull-down sink. If the logic lines to the MIC4807 are severed, these currents guarantee that the outputs will turn OFF. Individual latches in the MIC4807 are selected by a binary address presented at inputs AIN, BIN, and CIN. Data-in is directed to the addressed latch while CS is held low, allowing an individual output to be pulse-width modulated. When CS is set high again, the last Data-in is stored in the latch. If Datain = "1", the addressed output is turned on, and if Data-in = "0", the addressed output is turned off. Information presented to Data-in and the address inputs is transferred to the latches while CS is pulled low. For application, where several outputs must be (Continued) Features * * * * * * * * * 4.5V to 16V Operation Eight 80V 100mA Outputs Off-state Leakage less than 10A at 25C Short-Circuit Proof Thermal Shutdown with Hysteresis DMOS Output Devices (RON 7 at 25C) Lamp Drivers Solenoid Drivers Display Drivers -Electroluminescent -Vacuum Fluorescent -Plasma Relay Drivers Print Head Drivers Heater Drivers Power Semiconductor Drivers Security Systems Environmental Controls Process Controllers Applications * * * * * * * Pin Diagram HVOUT2 1 HVOUT3 2 VDD 3 OE Ground CS Clear HVOUT4 HVOUT5 4 5 6 7 8 9 18 HVOUT1 17 HVOUT0 16 Data-in Ordering Information Part Number MIC4807BN Operating Temperature-Range -40C to 85C Package 18-Pin Plastic DIP 7 MIC4807 15 AIN 14 BIN 13 CIN 12 VDD 11 HVOUT7 10 HVOUT6 Block Diagram VDD 12 Thermal Shutdown Current Limit 17 18 1 HVOUT 0 HVOUT 1 HVOUT 2 HVOUT 3 HVOUT 4 HVOUT 5 HVOUT 6 HVOUT 7 Addressing { AIN 15 BIN 14 CIN 13 Address Decoder Latches Data-in 16 Ground 5 6 CS 7 Clear Driver * * * * * * Driver 2 8 9 10 11 4 OE October 1998 7-3 MIC4807 Micrel When operated below current limit, the outputs appear as small-valued resistors (typically 5.1 at 25C) connected to ground. The "ON" resistance (RON) has a strong, positive temperature coefficient (approximately 7500 ppm/C) which promotes current sharing if two or more outputs are paralleled. General Description (Continued) turned on simultaneously, Gray Code address sequencing can be applied to Ain, Bin, Cin, while Data-in is held high and CS is held low. Data-in will be transferred to each address in turn, without the need to toggle CS. Similarly, a set of outputs could be simultaneously turned off by setting Data-in low. Gray Code ensures that no intermediate addresses are inadvertently accessed. A typical Gray Code is 0, 1, 3, 2, 6, 7, 5, 4. Each output drive circuit has a high-voltage, power DMOS device configured as a transconductance loop. This loop limits the output current to typically 200mA. While current limiting keeps the output device within its allowable safeoperating area (SOA), the power dissipation may be excessive. Long-term survival is guaranteed by thermal shutdown. Absolute Maximum Ratings (Notes 1, 2 and 3) Output Voltage (VOUT, OFF) 100V Supply Voltage (VDD) 16.5V Logic Input Voltage (VIN) -0.3V TO VDD + 0.3 Continuous Output Current (IOUT) Internally Limited Power Dissipation (PD, Note 2) Internally Limited Ambient Temperature (TA): -40C to +85C Maximum Junction Temperature (TJMAX) 150C Storage Temperature -65C to +150C JA - Plastic DIP 130C/W Electrical Characteristics: Test Circuit). (Note 6) MIC4807BN, TA = 25C, VDD = 15V unless otherwise specified (see Symbol VDD IDD Parameter Supply Voltage Supply Current Conditions Min 4.5 Typ Max 16 Units V mA mA V V OE = L (Note 3) OE = H (Note 4) 4.5V VDD 16V 2.0 5.5 1.5 10 3 0.8 VIN (0) VIN (1) IIN (0) Logic Input Voltage Logic Input Current for AIN, BIN, CIN, and Data-in Logic Input Current for CS, OE, and Clear Output Leakage Current Output "ON" Resistance Short Circuit Current VIN = 0V -150 -70 -25 A A A mA IIN (1) VIN = VDD 25 130 250 IOUT RON ISC OE = 0V, VOUT = 80V Output is ON, VOUT = 0.7V,VDD = 10V Output is ON< VOUT = 50V 10V VDD 15V (Note 5) 140 1 5.1 190 10 7 250 VOUT VOUT Output Voltage (OFF) Output Voltage (ON) IOUT = 50mA,VDD = 10V IOUT = 100mA, VDD = 10V VDD = 10V for all timing tests (A, see Timing Diagram) (B) 400 0.26 0.51 80 0.35 0.7 V V V ns Data and Address Set-up Time Data and Address Hold Time CS Pulse Width Turn-on Delay 50 ns (C) (D) 500 2.5 ns ns 7-4 October 1998 MIC4807 Micrel (Note 6) TA = 25C, VDD = 15V unless otherwise specified (see Test Circuit). Conditions (E) (F) Min Typ Max 2.5 2 Units s s s s ns Electrical Characteristics: Symbol Parameter Turn-Off Delay Output Disable Response Time Output Enable Response Time Clear Response Time Clear Pulse Width (G) 2 (H) (I) 500 2.5 Electrical Characteristics: Circuit). Symbol VDD IDD Parameter Supply Voltage Supply Current (Note 6) TA = -55C to +125C, VDD = 15V unless otherwise specified (see Test Conditions Min 4.5 Typ Max 16 15 4 0.8 Units V mA mA V V OE = L (Note 3) OE = H (Note 4) 4.5V VDD 16V 2.0 VIN (0) VIN (1) IIN (0) Logic Input Voltage Logic Input Current for AIN, BIN, CIN, and Data-in Logic Input Current for CS, OE, and Clear Output Leakage Current Output "ON" Resistance Short Circuit Current VIN = 0V -250 -10 A A A mA IIN (1) VIN = VDD 25 400 7 IOUT RON ISC OE = 0V, VOUT = 80V Output is ON, VOUT =0.7V,VDD=10V Output is ON< VOUT = 50V 10V VDD 15V (Note 5) 100 5.1 7 12 300 VOUT VOUT Output Voltage (OFF) Output Voltage (ON) IOUT = 50mA,VDD = 10V IOUT = 100mA, VDD = 10V VDD = 10V for all timing tests (A, see Timing Diagram) (B) 700 80 0.6 1.2 V V V ns Data and Address Set-up Time Data and Address Hold Time CS Pulse Width Turn-on Delay 50 ns (C) (D) 1000 5 ns s October 1998 7-5 MIC4807 Micrel (Note 6) TA = 25C, VDD = 15V unless otherwise specified (see Test Circuit). Conditions (E) (F) Min Typ Max 5 4 Units s s s s ns Electrical Characteristics: Symbol Parameter Turn-Off Delay Output Disable Response Time Output Enable Response Time Clear Response Time Clear Pulse Width (G) 4 (H) (I) 1000 5 Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device beyond its specified operating ratings. Note 2: The junction temperature is internally limited by a thermal shutdown circuit. The maximum power dissipation is a function of TJMAX, JA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJMAX - TA) / JA. If this dissipation is exceeded, the die temperature will rise above 150C, and the MIC4807 will go into thermal shutdown. Note 3: All outputs are off when OUTPUT ENABLE is pulled low. Note 4: All outputs are turned on during this test. Note 5: Pulse testing is used to avoid thermal shutown. Note 6: Minimum and Maximum limits are tested and 100% guaranteed over the temperature range specified. Typicals are measured at 25C and represent the most likely parametric norm. Timing Diagram Logic "1" Logic "0" CIN BIN AIN Data-in CS C H G D F H D E A B Clear OE HVOUT0 HVOUT1 HVOUT2 HVOUT3 HVOUT4 OFF ON 7-6 October 1998 MIC4807 Micrel Test Circuit and AC Waveform Measurement Standards VOUT3 VOUT2 1 2 18 17 16 VOUT1 VOUT0 R VIN C = 35pF R = 10k R C R C R C R C C R C R C R C VDD=10V VDD VIN 3 4 5 6 7 8 9 MIC4807 15 14 13 12 11 10 VIN VOUT7 VOUT6 VOUT5 VOUT4 VIN 5V 0V tDelay All reference times are taken from the 50% transition point. 10V VOUT 0V 7 October 1998 7-7 MIC4807 Micrel Equivalent Logic Diagram VDD AIN BIN CIN Data-in CS Clear OE 50A + - Drive Circuit 1.4V Address Decoder Total of 8 Channels Drive Circuit HVOUT0 + - 75A HVOUT7 OVER TEMP CIN BIN AIN CS Data-in Clear OE Truth Table CS X H L L L L L L L L X Clear Data-In CIN BIN AIN OE HVOUT0 HVOUT1 HVOUT2 HVOUT3 HVOUT4 HVOUT5 HVOUT6 HVOUT7 L H H H H H H H H H X X X D D D D D D D D X X X L L L L H H H H X X X L L H H L L H H X X X L H L H L H L H X X H H H H H H H H H L H P D P P P P P P P H H P P D P P P P P P H H P P P D P P P P P H H P P P P D P P P P H H P P P P P D P P P H H P P P P P P D P P H H P P P P P P P D P H H P P P P P P P P D H Functional Mode Clear Memory Address HVOUT0 Address HVOUT1 Address HVOUT2 Address HVOUT3 Address HVOUT4 Address HVOUT5 Address HVOUT6 Address HVOUT7 Blanking L = Low Logic Level H = High Logic Level D = Data (High or Low) X = Don't Care P = Previous State 7-8 October 1998 MIC4807 Micrel Typical DC Output Characteristics for the "On" State: (VDD = 10V and TA = 25C unless other wise specified) VDD = 10V VDD = 15V SHORT CIRCUIT CURRENT 400 300 IOUT (mA) IOUT (mA) EXPANDED VERSION OF SHORT CIRCUIT CURRENT FOR LOW OUTPUT VOLTAGE (VOUT) 400 300 200 200 100 100 0 0 20 40 VOUT (V) 60 80 0 0 1 2 3 4 5 VOUT (V) IOUT FOR SEPARATE VDD 120 100 IOUT AT 3 TEMPERATURES 120 100 T = -55C T = 25C IOUT (mA) IOUT (mA) 80 60 40 20 0 0 0.5 VOUT (V) 1.0 80 60 40 20 0 0.0 5.0 VOUT (V) 10.0 T = 125C 7 SHORT CIRCUIT CURRENT LIMIT (ISC) 200 15.0 ON RESISTANCE (RON) 10.0 ISC (mA) 100 RON () 5.0 0.0 0 0.0 5.0 VDD (V) 10.0 0.0 5.0 VDD (V) 10.0 October 1998 7-9 MIC4807 Micrel Pin Description Pin No. 5 12 1, 2, 8, 9,10, 11, 17,18 Pin Name Ground VDD HVOUT0 through HVOUT7 Functional Description Electrical ground to chip substrate. Positive logic supply voltage (10V-15V). These are the high voltage (HV) open outputs, each of which is capable of sinking 100mA when switched on, and standing off 80V when switched off. In addition, each output channel is equipped with an analog current limiter to protect it from shorts to the positive high voltage supply. When an output is shorted (up to 80V), a maximum of 225mA (200mA nominal) will flow through it to ground. When these inputs are combined together they form the BCD address used to select the desired output. Each input is TTL compatible with an internal pull-up current source of 50mA. When CS is at logic "0" the device is actively addressed, and when CS is at logic "1" the decoded address and input Data are inhibited, making the part unaddressable. CS is TTL compatible with an internal pull-down current sink of 75A. Clear resets all the outputs to the off state when pulled to logic "0", and is TTL compatible with an internal pull-down current sink of 75A. Data-in determines the state of the output being addressed. When Datain is at logic "0" the addressed output is turned off, and when Data-in is at logic "1" the addressed output is turned on. Data-in is TTL compatible with an internal pull-up current source of 50A. OE allows the bank of eight outputs to be duty cycled together. When OE is at logic "1" the outputs are enabled to follow their respective latches, and when OE is at logic "0" all the outputs are turned off. OE is TTL Compatible with a pull-down current sink of 75A. 13, 14, 15 CIN, BIN, &AIN 6 CS 7 Clear 16 Data-in 4 OE 7-10 October 1998 |
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